Technotools

home *** CD-ROM | disk | FTP | other *** search

/ Technotools / Technotools (Chestnut CD-ROM)(1993).ISO / lang_asm / ma22#1 / mcasm#1.doc < prev next >

Wrap

Text File | 1992-02-05 | 66.0 KB | 1,811 lines

MICEPT INSTRUMENTS INC. MICEPT INSTRUMENTS INC. Cross Assemblers (Series I) Cross Assemblers (Series I) Version 2.20 Version 2.20 USER'S MANUAL USER'S MANUAL Micept Instruments Inc. 377 Julien St. Cap De La Madeleine, PQ Canada G8T 6W6 DISCLAIMER DISCLAIMER Micept Instruments Inc. disclaims all warranties as to this software and the documentation, whether express or implied, including, without limitation, any implied warranties of merchantability and of fitness for any purpose. Micept Instruments Inc. assumes no liability for damages, direct or consequential, which may results from the use of this software or the documentation. Information in this document is subject to change without notice. Copyright (C) 1991, 1992 by Micept Instruments Inc. COPYRIGHT INFORMATION COPYRIGHT INFORMATION This version of the software is distributed as shareware. This version may be freely copied and distributed for evaluation purposes as long as NO FEE IS CHARGE FOR USE, COPYING OR DISTRIBUTION (EXCEPT FOR A NOMINAL DISTRIBUTION FEE PROVIDED THAT IT IS NO MORE THAN $5 TOTAL) and as long as THE SOFTWARE PACKAGE IS NOT MODIFIED IN ANY WAY. USE OF THIS SOFTWARE BEYOND A REASONABLE EVALUATION PERIOD REQUIRES REGISTRATION. The entire package, consisting of the main programs, documentation file and various utility files are all copyright (C) 1991, 1992 by Micept Instruments Inc. All rights reserved. Intel is a registered trademark of Intel Corporation. Zilog and Z80 are registered trademarks of Zilog Inc. MS-DOS is a trademark of Microsoft Corporation. IBM, PC, XT, AT are trademarks of International Business Machines Corporation. All brand and product names are trademarks or registered trademarks of their respective companies. TABLE OF CONTENTS TABLE OF CONTENTS 1. INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . 1 2. INSTALLATION . . . . . . . . . . . . . . . . . . . . . . . 1 3. SYSTEM REQUIREMENTS . . . . . . . . . . . . . . . . . . . 1 4. FILES IN THE PACKAGE . . . . . . . . . . . . . . . . . . . 1 5. FORMAT OF COMMANDS . . . . . . . . . . . . . . . . . . . . 2 6. COMMAND LINE . . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Invocation . . . . . . . . . . . . . . . . . . . . . 2 6.2 Options in more details . . . . . . . . . . . . . . 3 6.3 Error codes returned to DOS . . . . . . . . . . . . 5 6.4 Object code file formats . . . . . . . . . . . . . . 5 6.5 Environment variable . . . . . . . . . . . . . . . . 5 7. SOURCE LINE FORMAT . . . . . . . . . . . . . . . . . . . . 5 Label . . . . . . . . . . . . . . . . . . . . . . . . . 6 Opcode . . . . . . . . . . . . . . . . . . . . . . . . . 6 Operand . . . . . . . . . . . . . . . . . . . . . . . . 6 Comment . . . . . . . . . . . . . . . . . . . . . . . . 6 8. EXPRESSIONS IN THE OPERAND FIELD . . . . . . . . . . . . . 7 8.1 Symbols . . . . . . . . . . . . . . . . . . . . . . 7 8.2 Constants . . . . . . . . . . . . . . . . . . . . . 7 Numeric constants . . . . . . . . . . . . . . . . . 7 Character constants . . . . . . . . . . . . . . . . 8 The location counter . . . . . . . . . . . . . . . 8 8.3 Operators . . . . . . . . . . . . . . . . . . . . . 8 8.4 How expressions are evaluated . . . . . . . . . . . 9 9. ASSEMBLER DIRECTIVES . . . . . . . . . . . . . . . . . . . 9 ACLIST . . . . . . . . . . . . . . . . . . . . . . . . . 9 DB . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 DW . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 END . . . . . . . . . . . . . . . . . . . . . . . . . . 10 EQU . . . . . . . . . . . . . . . . . . . . . . . . . . 10 LIST . . . . . . . . . . . . . . . . . . . . . . . . . . 10 LLEN . . . . . . . . . . . . . . . . . . . . . . . . . . 11 NOACLIST . . . . . . . . . . . . . . . . . . . . . . . . 11 NOLIST . . . . . . . . . . . . . . . . . . . . . . . . . 11 ORG . . . . . . . . . . . . . . . . . . . . . . . . . . 11 PAGE . . . . . . . . . . . . . . . . . . . . . . . . . . 11 PLEN . . . . . . . . . . . . . . . . . . . . . . . . . . 12 REDEF . . . . . . . . . . . . . . . . . . . . . . . . . 12 RSB . . . . . . . . . . . . . . . . . . . . . . . . . . 12 RSW . . . . . . . . . . . . . . . . . . . . . . . . . . 12 SET . . . . . . . . . . . . . . . . . . . . . . . . . . 12 TITLE . . . . . . . . . . . . . . . . . . . . . . . . . 13 Micept Instruments Inc. - Cross Assemblers (Series I) iii 10. SPECIAL SECTION ON THE MICROPROCESSORS . . . . . . . . . 14 10.1 Intel 8044 . . . . . . . . . . . . . . . . . . . . 14 10.2 Intel 8048 . . . . . . . . . . . . . . . . . . . . 17 10.3 Intel 8051/52 . . . . . . . . . . . . . . . . . . . 18 10.4 Intel 8080 . . . . . . . . . . . . . . . . . . . . 22 10.5 Intel 8085 . . . . . . . . . . . . . . . . . . . . 23 10.6 Intel 8096 . . . . . . . . . . . . . . . . . . . . 23 10.7 Zilog Z80 . . . . . . . . . . . . . . . . . . . . . 23 11. BUG REPORTING PROCEDURE . . . . . . . . . . . . . . . . . 24 12. UPDATE POLICY . . . . . . . . . . . . . . . . . . . . . . 24 13. REGISTRATION . . . . . . . . . . . . . . . . . . . . . . 25 APPENDIX A - EXPANDED VERSION . . . . . . . . . . . . . . . . 26 ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . 27 ORDER FORM . . . . . . . . . . . . . . . . . . . . . . . . . 28 INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Micept Instruments Inc. - Cross Assemblers (Series I) 1 1. INTRODUCTION 1. INTRODUCTION This software are shareware distributed versions of high quality Macro Cross Assemblers which you get when you register. These versions however do not support macros, conditional assembly and included files like their expanded versions do. This software are basic two-pass assemblers for the Intel 8051/52, 8044, 8048, 8080, 8085, 8096 and the Zilog Z80 microprocessors. These powerful cross assemblers for the MS-DOS operating system support the complete instruction set and a complete set of directives. They also support the 8051/52 and 8044 special function registers and their assigned bit names. These assemblers can produce formatted listing files and object code in both the Intel Hex and the Motorola Hex formats. The supported assembler directives are the same as the ones used by the microprocessor manufacturers, but you can customized them to your liking using the REDEF directive. 2. INSTALLATION 2. INSTALLATION Make a working copy of your disk, using the COPY or DISKCOPY utility supplied with MS-DOS. Save the original disk for backup. No particular installation is required except that you have to copy the executable files you will need to the disk you are going to use. 3. SYSTEM REQUIREMENTS 3. SYSTEM REQUIREMENTS - IBM PC/XT/AT or compatible computer - DOS 2.0 or later - 256K Bytes of RAM required (more for bigger symbol table) 4. FILES IN THE PACKAGE 4. FILES IN THE PACKAGE README#1 The file containing the latest information ORDER#1.FRM The file containing the ready to print registration form MCASM#1.DOC This file ! MA44.EXE The executable file of the 8044 Cross Assembler MA48.EXE The executable file of the 8048 Cross Assembler MA51.EXE The executable file of the 8051/52 Cross Assembler Micept Instruments Inc. - Cross Assemblers (Series I) 2 MA80.EXE The executable file of the 8080 Cross Assembler MA85.EXE The executable file of the 8085 Cross Assembler MA96.EXE The executable file of the 8096 Cross Assembler MAZ80.EXE The executable file of the Z80 Cross Assembler 5. FORMAT OF COMMANDS 5. FORMAT OF COMMANDS The following rules are used in this manual: 1. Words in capital letters are keywords and must be entered as shown. They may be entered in uppercase or lowercase characters. 2. Items in square brackets ([]) are optional. 3. Symbolic fields are enclosed in < >. 4. An ellipsis (...) indicates that an item may be repeated as many time as you wish. 5. All punctuation, except the one mentioned before, must be included where shown. 6. xxx is a two or three character string representing the microprocessor identification. This string is: 44 : for the Intel 8044 microprocessor 48 : for the Intel 8048 microprocessor 51 : for the Intel 8051/52 microprocessor 80 : for the Intel 8080 microprocessor 85 : for the Intel 8085 microprocessor 96 : for the Intel 8096 microprocessor Z80 : for the Zilog Z80 microprocessor 6. COMMAND LINE 6. COMMAND LINE 6.1 Invocation These assemblers can be invoked as follow: MAxxx [<options>] <sourcefile> [<objfile> [<listfile>]] Micept Instruments Inc. - Cross Assemblers (Series I) 3 Where <options> can be one or more of the following separated by spaces: -l : Produce a listing file -o : Produce NO object file -t : Produce NO symbol table in the listing -m : Produce object in Motorola Hex -q : Quiet mode -p<n> : Set listing page length (in lines per page) -w<n> : Set listing width (in characters per line) -r<n> : Set object record size (in bytes) -x : Use extended special function register set for 8052 -c : Produce complete object in listing for long constants <sourcefile> : Source file name. Default extension ".xxx". <objfile> : Object file name. Default extension ".OBJ". <listfile> : Listing file name. Default extension ".LST". If the assembler is invoked with an error in the command line, a help screen is displayed on the console. For <objfile> and <listfile>, if no name is specified, the source file name with the default extensions will be used and the files will be created in the current directory. 6.2 Options in more details c - Complete object code in listing for long constants. This is used to see all object codes generated by long constants, like strings and series of data. A source line may then generate more than one line in the listing because only a few object codes can be written on one line of listing. l - Listing file. This option enables the output to a listing file. The listing produced has page headers and footers inserted at appropriate intervals. Even when the option is invoked, the output to the listing file will be controlled by the LIST and NOLIST directives. m - Motorola Hex format. This option causes the object file to be produced in the Motorola Hex format rather than the default Intel Hex format. o - Object file disabled. This option suppresses the output to an object file. Micept Instruments Inc. - Cross Assemblers (Series I) 4 p - Page length. This option sets the number of lines per page in the listing file. When a listing file is produced, since page headers and footers are inserted, a page length is required. If this option, immediately followed by a numeric constant, is invoked, the page length will be set to that value. The value must be between 20 and 120 or it will be ignored. Even when this option is invoked, the page length may be set again anywhere in the file by the PLEN directive. The default page length is 66 lines. q - Quiet mode. This option turns off the display of line numbers during assembly. Normally a running count, incremented by 50s, of the numbers of lines being assembled is displayed on the console. r - Record size in the object file. This option sets the number of bytes in each object file record. The number selected is the number of counted bytes in the selected format. The number must be between 8 and 255 or it will be ignored. If the m option is invoked, the r option must appear after it in the command line to have any effect. The default record size in Intel Hex is 24. The default record size in Motorola Hex is 27. t - Table of symbols suppressed in the listing file. This option suppresses the output of the symbol table in the listing file. Of course if output to the listing file is disabled at the end of the listing, the symbol table will not appear at the end of the listing file anyway. w - Width of the listing file. This option sets the number of characters per line in the listing file. If this option, immediately followed by a numeric constant, is invoked, the line length will be set to that value. The value must be between 60 and 132 or it will be ignored. Even when this option is invoked, the line length may be set again anywhere in the file by the LLEN directive. The default line length is 80 characters. x - Extended special function register set. This option allows the use of the extended special function register set and the extended special function register bit set of the 8052 microprocessor. Note: Each option must be preceded by a dash (-) in the command line, to distinguish it from a file name. Micept Instruments Inc. - Cross Assemblers (Series I) 5 6.3 Error codes returned to DOS Condition Error code ------------------------------------------------------- Normal completion, without errors 0 Normal completion, with assembly errors 1 Abnormal completion, insufficient memory 2 Abnormal completion, file access error 3 6.4 Object code file formats Each assembler supports two object file formats: 1. Intel Hex 2. Motorola Hex (S1-S9) 6.5 Environment variable Each assembler environment can be customized by the use of an environment variable. The variable, if set, will specify the default command line options. The options specified in that variable will not replace but be added to the options invoked in the command line. Options are specified in the same manner as if they were invoked in the command line. The setting of this variable can be automatically done if the set command is placed in the AUTOEXEC.BAT file. The variable is called MAxxxOPT and can be set by the following command: set MAxxxOPT=-l -m -r10h That command would invoked the l, m and r options each time the assembler is invoked. Note: Any error in this environment variable will be ignored. 7. SOURCE LINE FORMAT 7. SOURCE LINE FORMAT Lines in the source file consist of up to four fields, as follows: [Label] [Opcode] [Operand] [Comment] Each line of the file may be up to 256 characters long. An arbitrary number of white space (spaces or tabs) must separate each field. Micept Instruments Inc. - Cross Assemblers (Series I) 6 Label: Labels are symbols and follow the same rules. If a label starts in the first column, it must be terminated with at least one white space (space or tab) or the end of the line but it may follow the rules of a label starting in any other column. If a label starts in any other column, it must be terminated with a colon (:) followed with at least one white space (space or tab) or the end of the line. The ending colon is never part of the symbol. A line may consist of a label alone. With a normal instruction mnemonic the assembler assign a value to the label equal to the current location counter. Opcode: The operand field contains the instruction mnemonic or the assembler directive that is to be performed. This field must not start in the first column. Operand: The operand field may or may not be required, depending on the opcode or directive being assembled. If present, this field will contain a certain number of operand, separated by commas. There must not be any white space (space or tab) between these operand. Comment: The optional comment field is used for annotation purposes. This field is ignored by the assembler, but is included in the listing. A semicolon (;) is used by the assembler to designate the beginning of a comment and it can be used anywhere in the line, including in the first column for a stand-alone comment. Micept Instruments Inc. - Cross Assemblers (Series I) 7 8. EXPRESSIONS IN THE OPERAND FIELD 8. EXPRESSIONS IN THE OPERAND FIELD Expressions are combinations of constants, symbols, operators and parentheses that are evaluated as an integer value. 8.1 Symbols Symbols are strings of characters that contain letters (A-Z, a-z), numbers (0-9), points (.) and underscores (_) but they must begin with a letter. A symbol may be of any length, but only the first 8 characters are significant and will be listed in the symbol table. Since all lowercase letter will be converted to uppercase, symbols which are capitalized differently will be the same. A symbol can not be a reserved word. examples: LOOP loop_2 key.buffer The reserved words are the one representing: - the mnemonics and assembler directives. - the microprocessor's registers. 8.2 Constants Numeric constants: Numeric constants must always begin with a decimal digit. The radix is determine by a letter immediately following the number according to the following table: Format Suffix --------------------------- Binary B Octal O or Q Decimal D or nothing Hexadecimal H examples: 10010001b 7774Q 17O 18d 255 6fh Micept Instruments Inc. - Cross Assemblers (Series I) 8 0FEH Character constants: A character constant consists of one ASCII character surrounded by single quote marks ('). Note: To put a single quote mark into a character constant, two consecutive single quotes may be used to represent one such character. examples: 'a' '*' '''' The location counter: The current value of the location counter can be used in an expression. It is represented by the dollar character ($). 8.3 Operators The operators allowed in expressions are shown, in the following table, in descending order of precedence: Order Operator Type Description ---------------------------------------------------------- 1. () expression parentheses 2. - unary unary negative ~ one's complement 3. & binary bitwise AND ! bitwise OR ^ bitwise EXCLUSIVE OR 4. * multiplicative multiplication / division % remainder 5. + additive addition - subtraction 6. << shift shift left >> shift right 7. = relational equal < less than > greater than <= less than or equal >= greater than or equal Micept Instruments Inc. - Cross Assemblers (Series I) 9 8.4 How expressions are evaluated In an expression parenthetical expressions are evaluated first, the innermost parentheses before the outer ones. Next, operations involving higher precedence operators are done first. Where several operators have the same precedence they are evaluated from left to right except for unary operators which are evaluated from right to left. All intermediate values are truncated to a 16-bit integer value. The result of the expression is also a 16-bit integer value. 9. ASSEMBLER DIRECTIVES 9. ASSEMBLER DIRECTIVES ---------------------------------------------------------- Assembly Control ORG Set assembly origin END End of source REDEF Redefine an assembler directive ---------------------------------------------------------- Symbol Definition EQU Equate symbol value SET Set symbol value (temporary) ---------------------------------------------------------- Memory Allocation DB Define constant byte(s) DW Define constant word(s) RSB Reserve storage for byte(s) RSW Reserve storage for word(s) ---------------------------------------------------------- Listing Control TITLE Set title of page(s) LLEN Set line length (characters per line) PLEN Set page length (lines per page) PAGE Advance to top of next page LIST List the assembly NOLIST Do not list the assembly ACLIST List all object codes for long constants NOACLIST Do not list all object codes ---------------------------------------------------------- Note: Some of these directives have a different name with each microprocessor, so consult the special section on the microprocessor you are using. ACLIST Purpose: This directive restores the listing of the complete object code for long constants. Micept Instruments Inc. - Cross Assemblers (Series I) 10 Format: ACLIST DB Purpose: This directive allocates and initializes one or more bytes. Format: [<label>] DB <expression>[,<expression>...] Remarks: <expression> must be an 8-bit integer value or a string surrounded by single quote marks ('). DW Purpose: This directive allocates and initializes one or more words. Format: [<label>] DW <expression>[,<expression>...] Remarks: <expression> must be a 16-bit integer value. END Purpose: This directive designates the end of the source file. Format: END Remarks: No line in the source file will be read after this directive. EQU Purpose: This directive assigns the value of <expression> to <label>. Format: <label> EQU <expression> Remarks: The <label> entry can not be redefined. LIST Purpose: This directive restores the output in the listing. Format: LIST Micept Instruments Inc. - Cross Assemblers (Series I) 11 Remarks: If a listing is not being made, this directive will start one. LLEN Purpose: This directive sets the number of characters per line, in the listing, to the value of <expression>. Format: LLEN <expression> Remarks: The number of characters per line must be between 60 and 132. The default is 80 characters per line. NOACLIST Purpose: This directive suppresses the listing of the complete object code for long constants. Format: NOACLIST NOLIST Purpose: This directive suppresses the output in the listing. Format: NOLIST ORG Purpose: This directive sets the location counter to the value of <expression>. Format: ORG <expression> Remarks: <expression> must not involved any forward references. PAGE Purpose: This directive starts a new page in the listing. Format: PAGE Micept Instruments Inc. - Cross Assemblers (Series I) 12 PLEN Purpose: This directive sets the number of lines per page, in the listing, to the value of <expression>. Format: PLEN <expression> Remarks: The number of lines per page must be between 20 and 120. The default is 66 characters per line. The first and the last 3 lines of the page are left blank. The fourth and fifth line are used for the date, page number and page title. REDEF Purpose: This directive redefines the <directive> assembler directive to the <directive2> directive. Format: REDEF <directive>,<directive2> Remarks: This allows you to change the name of each and every directive to satisfy your particular source file needs. You can also use it to make your own set of universal directives. RSB Purpose: This directive reserves a block of <expression> byte(s) for storage. Format: [<label>] RSB <expression> Remarks: The number of bytes reserved must be between 1 and 32767. RSW Purpose: This directive reserves a block of <expression> word(s) for storage. Format: [<label>] RSW <expression> Remarks: The number of words reserved must be between 1 and 16383. SET Micept Instruments Inc. - Cross Assemblers (Series I) 13 Purpose: This directive assigns the value of <expression> to <label>. Format: <label> SET <expression> Remarks: The <label> entry can be redefined. TITLE Purpose: This directive sets the title of the current and following page(s) to the <text> string. Format: TITLE <text> Remarks: <text> is truncated to the first 60 characters. Micept Instruments Inc. - Cross Assemblers (Series I) 14 10. SPECIAL SECTION ON THE MICROPROCESSORS 10. SPECIAL SECTION ON THE MICROPROCESSORS 10.1 Intel 8044 The reserved words in this assembler are: A, AB, C, DPTR, R0, R1, R2, R3, R4, R5, R6, R7 Special Function Registers: The 8044 has Special Function Registers. These constants are words representing the 8044 microprocessor registers accessible through the use of their addresses in the on-chip RAM. These are predefined in this assembler: ACC, B, PSW, SP, DPL, DPH, P0, P1, P2, P3, IP, IE, TMOD, TCON, TH0, TL0, TH1, TL1, FIFO, TBS, TBL, TCB, NSNR, STAD, RFL, RBS, RBL, RCB, SMD, STS, SMD Special Function Register Bits: These Special Function Registers have bits which are directly accessible. These constants are words representing the 8044 microprocessor register bits accessible through the use of their addresses in the on-chip RAM. These are predefined in the assembler: SFR bit Description --------------------- P PSW bit 0 OV PSW bit 2 RS0 PSW bit 3 RS1 PSW bit 4 F0 PSW bit 5 AC PSW bit 6 CY PSW bit 7 EX0 IE bit 0 ET0 IE bit 1 EX1 IE bit 2 ET1 IE bit 3 ES IE bit 4 ET2 IE bit 5 EA IE bit 7 PX0 IP bit 0 PT0 IP bit 1 PX1 IP bit 2 PT1 IP bit 3 Micept Instruments Inc. - Cross Assemblers (Series I) 15 PS IP bit 4 PT2 IP bit 5 IT0 TCON bit 0 IE0 TCON bit 1 IT1 TCON bit 2 IE1 TCON bit 3 TR0 TCON bit 4 TF0 TCON bit 5 TR1 TCON bit 6 TF1 TCON bit 7 ACC.0 Accumulator bit 0 ACC.1 Accumulator bit 1 ACC.2 Accumulator bit 2 ACC.3 Accumulator bit 3 ACC.4 Accumulator bit 4 ACC.5 Accumulator bit 5 ACC.6 Accumulator bit 6 ACC.7 Accumulator bit 7 B.0 Register B bit 0 B.1 Register B bit 1 B.2 Register B bit 2 B.3 Register B bit 3 B.4 Register B bit 4 B.5 Register B bit 5 B.6 Register B bit 6 B.7 Register B bit 7 PSW.0 PSW bit 0 PSW.1 PSW bit 1 PSW.2 PSW bit 2 PSW.3 PSW bit 3 PSW.4 PSW bit 4 PSW.5 PSW bit 5 PSW.6 PSW bit 6 PSW.7 PSW bit 7 P0.0 Port 0 bit 0 P0.1 Port 0 bit 1 P0.2 Port 0 bit 2 P0.3 Port 0 bit 3 P0.4 Port 0 bit 4 P0.5 Port 0 bit 5 P0.6 Port 0 bit 6 P0.7 Port 0 bit 7 P1.0 Port 1 bit 0 P1.1 Port 1 bit 1 P1.2 Port 1 bit 2 P1.3 Port 1 bit 3 P1.4 Port 1 bit 4 P1.5 Port 1 bit 5 P1.6 Port 1 bit 6 P1.7 Port 1 bit 7 Micept Instruments Inc. - Cross Assemblers (Series I) 16 P2.0 Port 2 bit 0 P2.1 Port 2 bit 1 P2.2 Port 2 bit 2 P2.3 Port 2 bit 3 P2.4 Port 2 bit 4 P2.5 Port 2 bit 5 P2.6 Port 2 bit 6 P2.7 Port 2 bit 7 P3.0 Port 3 bit 0 P3.1 Port 3 bit 1 P3.2 Port 3 bit 2 P3.3 Port 3 bit 3 P3.4 Port 3 bit 4 P3.5 Port 3 bit 5 P3.6 Port 3 bit 6 P3.7 Port 3 bit 7 IP.0 IP bit 0 IP.1 IP bit 1 IP.2 IP bit 2 IP.3 IP bit 3 IP.4 IP bit 4 IP.5 IP bit 5 IP.6 IP bit 6 IP.7 IP bit 7 IE.0 IE bit 0 IE.1 IE bit 1 IE.2 IE bit 2 IE.3 IE bit 3 IE.4 IE bit 4 IE.5 IE bit 5 IE.6 IE bit 6 IE.7 IE bit 7 TCON.0 TCON bit 0 TCON.1 TCON bit 1 TCON.2 TCON bit 2 TCON.3 TCON bit 3 TCON.4 TCON bit 4 TCON.5 TCON bit 5 TCON.6 TCON bit 6 TCON.7 TCON bit 7 RBP STS bit 0 AM STS bit 1 CPB STS bit 2 BV STS bit 3 SI STS bit 4 RTS STS bit 5 RE STS bit 6 TBF STS bit 7 SER NSNR bit 0 NR0 NSNR bit 1 Micept Instruments Inc. - Cross Assemblers (Series I) 17 NR1 NSNR bit 2 NR2 NSNR bit 3 SES NSNR bit 4 NS0 NSNR bit 5 NS1 NSNR bit 6 NS2 NSNR bit 7 STS.0 STS bit 0 STS.1 STS bit 1 STS.2 STS bit 2 STS.3 STS bit 3 STS.4 STS bit 4 STS.5 STS bit 5 STS.6 STS bit 6 STS.7 STS bit 7 NSNR.0 NSNR bit 0 NSNR.1 NSNR bit 1 NSNR.2 NSNR bit 2 NSNR.3 NSNR bit 3 NSNR.4 NSNR bit 4 NSNR.5 NSNR bit 5 NSNR.6 NSNR bit 6 NSNR.7 NSNR bit 7 Note: Consult a data book on the 8044 microprocessor architecture for more details on the special function registers. Assembler directives: For this microprocessor, the standard assembler directives have been predefined as following: DATA instead of EQU ORG END DB DW SET DS instead of RSB DSW instead of RSW 10.2 Intel 8048 The reserved words in this assembler are: A, R0, R1, R2, R3, R4, R5, R6, R7, @R0, @R1, BUS, P1, P2, P4, P5, P6, P7, C, F0, F1, I, TCNTI, CLK, @A, PSW, T, MB0, MB1, RB0, RB1, TCNT, CNT Micept Instruments Inc. - Cross Assemblers (Series I) 18 Assembler directives: For this microprocessor, the standard assembler directives have been predefined as following: DATA instead of EQU ORG END DB DW SET DS instead of RSB RSW is not supported, because it is not necessary 10.3 Intel 8051/52 The reserved words in this assembler are: A, AB, C, DPTR, R0, R1, R2, R3, R4, R5, R6, R7 Special Function Registers: The 8051 has Special Function Registers. These constants are words representing the 8051 microprocessor registers accessible through the use of their addresses in the on-chip RAM. These are predefined in this assembler: ACC, B, PSW, SP, DPL, DPH, P0, P1, P2, P3, IP, IE, TMOD, TCON, TH0, TL0, TH1, TL1, SCON, SBUF, PCON If the extended special function register set option is invoked (x option), the 8052 microprocessor additional special function registers are also predefined in the assembler. These are: T2CON, TH2, TL2, RCAP2H, RCAP2L Special Function Register Bits: These Special Function Registers have bits which are directly accessible. These constants are words representing the 8051 microprocessor register bits accessible through the use of their addresses in the on-chip RAM. Micept Instruments Inc. - Cross Assemblers (Series I) 19 These are predefined in the assembler: SFR bit Description --------------------- P PSW bit 0 OV PSW bit 2 RS0 PSW bit 3 RS1 PSW bit 4 F0 PSW bit 5 AC PSW bit 6 CY PSW bit 7 EX0 IE bit 0 ET0 IE bit 1 EX1 IE bit 2 ET1 IE bit 3 ES IE bit 4 ET2 IE bit 5 EA IE bit 7 PX0 IP bit 0 PT0 IP bit 1 PX1 IP bit 2 PT1 IP bit 3 PS IP bit 4 PT2 IP bit 5 IT0 TCON bit 0 IE0 TCON bit 1 IT1 TCON bit 2 IE1 TCON bit 3 TR0 TCON bit 4 TF0 TCON bit 5 TR1 TCON bit 6 TF1 TCON bit 7 RI SCON bit 0 TI SCON bit 1 RB8 SCON bit 2 TB8 SCON bit 3 REN SCON bit 4 SM2 SCON bit 5 SM1 SCON bit 6 SM0 SCON bit 7 RXD Port 3 bit 0 TXD Port 3 bit 1 INT0 Port 3 bit 2 INT1 Port 3 bit 3 T0 Port 3 bit 4 T1 Port 3 bit 5 WR Port 3 bit 6 RD Port 3 bit 7 ACC.0 Accumulator bit 0 ACC.1 Accumulator bit 1 Micept Instruments Inc. - Cross Assemblers (Series I) 20 ACC.2 Accumulator bit 2 ACC.3 Accumulator bit 3 ACC.4 Accumulator bit 4 ACC.5 Accumulator bit 5 ACC.6 Accumulator bit 6 ACC.7 Accumulator bit 7 B.0 Register B bit 0 B.1 Register B bit 1 B.2 Register B bit 2 B.3 Register B bit 3 B.4 Register B bit 4 B.5 Register B bit 5 B.6 Register B bit 6 B.7 Register B bit 7 PSW.0 PSW bit 0 PSW.1 PSW bit 1 PSW.2 PSW bit 2 PSW.3 PSW bit 3 PSW.4 PSW bit 4 PSW.5 PSW bit 5 PSW.6 PSW bit 6 PSW.7 PSW bit 7 P0.0 Port 0 bit 0 P0.1 Port 0 bit 1 P0.2 Port 0 bit 2 P0.3 Port 0 bit 3 P0.4 Port 0 bit 4 P0.5 Port 0 bit 5 P0.6 Port 0 bit 6 P0.7 Port 0 bit 7 P1.0 Port 1 bit 0 P1.1 Port 1 bit 1 P1.2 Port 1 bit 2 P1.3 Port 1 bit 3 P1.4 Port 1 bit 4 P1.5 Port 1 bit 5 P1.6 Port 1 bit 6 P1.7 Port 1 bit 7 P2.0 Port 2 bit 0 P2.1 Port 2 bit 1 P2.2 Port 2 bit 2 P2.3 Port 2 bit 3 P2.4 Port 2 bit 4 P2.5 Port 2 bit 5 P2.6 Port 2 bit 6 P2.7 Port 2 bit 7 P3.0 Port 3 bit 0 P3.1 Port 3 bit 1 P3.2 Port 3 bit 2 P3.3 Port 3 bit 3 Micept Instruments Inc. - Cross Assemblers (Series I) 21 P3.4 Port 3 bit 4 P3.5 Port 3 bit 5 P3.6 Port 3 bit 6 P3.7 Port 3 bit 7 IP.0 IP bit 0 IP.1 IP bit 1 IP.2 IP bit 2 IP.3 IP bit 3 IP.4 IP bit 4 IP.5 IP bit 5 IP.6 IP bit 6 IP.7 IP bit 7 IE.0 IE bit 0 IE.1 IE bit 1 IE.2 IE bit 2 IE.3 IE bit 3 IE.4 IE bit 4 IE.5 IE bit 5 IE.6 IE bit 6 IE.7 IE bit 7 TCON.0 TCON bit 0 TCON.1 TCON bit 1 TCON.2 TCON bit 2 TCON.3 TCON bit 3 TCON.4 TCON bit 4 TCON.5 TCON bit 5 TCON.6 TCON bit 6 TCON.7 TCON bit 7 SCON.0 SCON bit 0 SCON.1 SCON bit 1 SCON.2 SCON bit 2 SCON.3 SCON bit 3 SCON.4 SCON bit 4 SCON.5 SCON bit 5 SCON.6 SCON bit 6 SCON.7 SCON bit 7 If the extended special function register set option is invoked (x option), the 8052 microprocessor additional special function register bits are also predefined in the assembler. These are: SFR bit Description --------------------- CPRL2 T2CON bit 0 CT2 T2CON bit 1 TR2 T2CON bit 2 EXEN2 T2CON bit 3 Micept Instruments Inc. - Cross Assemblers (Series I) 22 TCLK T2CON bit 4 RCLK T2CON bit 5 EXF2 T2CON bit 6 TF2 T2CON bit 7 T2CON.0 T2CON bit 0 T2CON.1 T2CON bit 1 T2CON.2 T2CON bit 2 T2CON.3 T2CON bit 3 T2CON.4 T2CON bit 4 T2CON.5 T2CON bit 5 T2CON.6 T2CON bit 6 T2CON.7 T2CON bit 7 Note: Consult a data book on the 8051, 8052 microprocessor architectures for more details on the special function registers. Assembler directives: For this microprocessor, the standard assembler directives have been predefined as following: DATA instead of EQU ORG END DB DW SET DS instead of RSB DSW instead of RSW 10.4 Intel 8080 The reserved words in this assembler are: A, B, C, D, E, H, L, M, BC, DE, HL, SP Assembler directives: For this microprocessor, the standard assembler directives have been predefined as following: EQU ORG END DB DW SET DS instead of RSB RSW is not supported, because it is not necessary Micept Instruments Inc. - Cross Assemblers (Series I) 23 10.5 Intel 8085 The reserved words in this assembler are: A, B, C, D, E, H, L, M, BC, DE, HL, SP Assembler directives: For this microprocessor, the standard assembler directives have been predefined as following: EQU ORG END DB DW SET DS instead of RSB RSW is not supported, because it is not necessary 10.6 Intel 8096 There are no reserved words in this assembler. Assembler directives: For this microprocessor, the standard assembler directives have been predefined as following: EQU ORG END DCB instead of DB DCW instead of DW SET DSB instead of RSB DSW instead of RSW 10.7 Zilog Z80 The reserved words in this assembler are: A, B, C, D, E, H, L, BC, DE, HL, SP, IX, IY, M, NC, NZ, Z, P, PE, PO, AF, I, R Micept Instruments Inc. - Cross Assemblers (Series I) 24 Assembler directives: For this microprocessor, the standard assembler directives have been predefined as following: EQU ORG END DEFB instead of DB DEFW instead of DW DEFL instead of SET DEFS instead of RSB RSW is not supported, because it is not necessary 11. BUG REPORTING PROCEDURE 11. BUG REPORTING PROCEDURE Although each software is extensively tested prior to release, no software is perfect and may contain a few bugs. It is the intention of Micept Instruments Inc. to correct any genuine problem that will be considered as a problem by the company, although this is not a warranty that any problem will be corrected. If you have any comments or suggestions, please send them to the following address or mail them to us on CompuServe. If you think you have found a bug in this software, please take the time to report it. Any report will be helpful, but you should follow these directions: 1. Provide the name and version of the software. 2. Provide a brief description of the problem and provide a copy or listing of the problem source file. Please try to isolate the problem area in the source and only provide that part of the source file. 3. Send it to: Micept Instruments Inc. CIS:[72130,2513] 377 Julien St. Cap De La Madeleine, PQ Canada G8T 6W6 12. UPDATE POLICY 12. UPDATE POLICY Micept Instruments Inc. will not notify users of new version releases as improvements are made constantly. If registered users would like to keep current they may send us their original distribution disk (the one with our label) along with payment (see order form) to receive the most current version. Micept Instruments Inc. - Cross Assemblers (Series I) 25 13. REGISTRATION 13. REGISTRATION The registration fee, for each Macro Cross Assembler (one per microprocessor) will licence one copy of the expanded version that you will receive, for use on any one computer at any one time. The printed manual is optional but recommended and includes a special section on each of the microprocessors of the series. Do not be misled by the very low prices of these Macro Cross Assemblers. They are of very high quality, fast and reliable. The only reason why we can offer them to you at such a low price, is because of the distribution method we have chosen, shareware. Site registrations are available (see ordering information and order form). Micept Instruments Inc. - Cross Assemblers (Series I) 26 APPENDIX A - EXPANDED VERSION APPENDIX A - EXPANDED VERSION Registered users get this expanded version of the software. The version supports: - up to 16 nested included files - up to 16 nested conditional assembly - up to 16 nested macros - unlimited number of include files - unlimited number of macros (limited by memory) The expanded directive set includes the following: ---------------------------------------------------------- Conditional Assembly IF Assemble if not equal to zero IFN Assemble if equal to zero IFC Assemble if string1 equals string2 IFNC Assemble if string1 not equal to string2 ELSE Reverse condition ENDIF End of conditional assembly FAIL Print error message ---------------------------------------------------------- Include files INCLUDE Include file ---------------------------------------------------------- Macro Directives MACRO Define a macro ENDM End of macro definition EXITM Skip to the end of a macro definition ---------------------------------------------------------- Listing Control FLIST List false conditions FNOLIST Do not list false conditions EXPAND Expand macros NOEXPAND Do not expand macros ---------------------------------------------------------- ORDERING INFORMATION ORDERING INFORMATION Cat. Description License No. Fee ============================================================== Series I -------------------------------------------- MA44 Macro Cross Assembler for the Intel 8044 $10.00 MA48 Macro Cross Assembler for the Intel 8048 $10.00 MA51 Macro Cross Assembler for the Intel 8051/52 $10.00 MA80 Macro Cross Assembler for the Intel 8080 $10.00 MA85 Macro Cross Assembler for the Intel 8085 $10.00 MA96 Macro Cross Assembler for the Intel 8096 $10.00 MAZ80 Macro Cross Assembler for the Zilog Z80 $10.00 SERIES-I Complete series containing the Macro $49.00 Cross Assemblers for the Intel 8044, 8048, 8051/52, 8080, 8085, 8096 and the Zilog Z80 (manual not included) MANUAL-I Manual for the Macro Cross Assemblers of $20.00 the series I and containing a special section for each of the microprocessors Series II -------------------------------------------- MA03 Macro Cross Assembler for the Motorola 6803 $10.00 MA05 Macro Cross Assembler for the Motorola 6805 $10.00 MA09 Macro Cross Assembler for the Motorola 6809 $10.00 MA65 Macro Cross Assembler for the Rockwell 6502 $10.00 MA65C Macro Cross Assembler for the Rockwell 65C02 $10.00 MA68 Macro Cross Assembler for the Motorola 6800 $10.00 SERIES-II Complete series containing the Macro $49.00 Cross Assemblers for the Motorola 6800, 6803, 6805, 6809, and the Rockwell 6502 and 65C02 (manual not included) MANUAL-II Manual for the Macro Cross Assemblers of $20.00 the series II and containing a special section for each of the microprocessors Complete package -------------------------------------------- MICRO-8 Package containing all the Macro Cross $119.00 Assemblers of the series I and series II (both manuals included) ----------------------------------------------------------------- Note: The manual is optional but recommended. Only one manual is required by series. ORDER FORM ORDER FORM #92-MC220-001 Qty Cat. No. Description Unit Price Price --- -------- ----------------------- ---------- ---------- ___ ________ _______________________ $_____.___ $_____.___ ___ ________ _______________________ $_____.___ $_____.___ ___ ________ _______________________ $_____.___ $_____.___ ___ ________ _______________________ $_____.___ $_____.___ ___ ________ _______________________ $_____.___ $_____.___ ___ ________ _______________________ $_____.___ $_____.___ ___ ________ _______________________ $_____.___ $_____.___ ___ ________ _______________________ $_____.___ $_____.___ Subtotal $_____.___ Add $6.00 Shipping + handling $_____.___ (outside North America Add $10.00) Subtotal $_____.___ Canada residents Add GST $_____.___ Subtotal $_____.___ Quebec residents Add Provincial Sales Tax $_____.___ Total U.S. dollars $_____.___ Payments in Canadian Dollars: Total Can. dollars $_____.___ Exchange rate ______ Send your check or money order to: Micept Instruments Inc. 377 Julien St. Specify disk format: Cap De La Madeleine, PQ ___ 5 1/4 or ___ 3 1/2 Canada G8T 6W6 Name: _______________________________________ Company: _______________________________________ Address: _______________________________________ _______________________________________ * Prices are in U.S. dollars. We accept only U.S. and Canadian funds. All other will be refused. Prices and availability are subject to change without notice. INDEX INDEX ACLIST . . . . . . . . . . 9 Invocation . . . . . . . . 2 Assembler directives . . . 9 Label . . . . . . . . . . . 6 Binary . . . . . . . . . . 7 Lines per page . . . . . . 4 Bug reporting procedure . . 24 LIST . . . . . . . . . . . 10 Character constants . . . . 8 Listing file . . . . . . 3, 4 Characters per line . . . . 4 LLEN . . . . . . . . . . . 11 Codes returned to DOS . . . 5 Location counter . . . . . 8 Command line . . . . . . . 2 Manual . . . . . . . . . . 2 Comment . . . . . . . . . . 6 Microprocessors . . . . . . 14 Constants . . . . . . . . . 7 Intel 8044 . . . . . . 14 Copyright information . . . i Intel 8048 . . . . . . 17 DB . . . . . . . . . . . . 10 Intel 8051/52 . . . . 18 Decimal . . . . . . . . . . 7 Intel 8080 . . . . . . 22 Default options . . . . . . 5 Intel 8085 . . . . . . 23 Directives . . . . . . . . 9 Intel 8096 . . . . . . 23 ACLIST . . . . . . . . 9 Zilog Z80 . . . . . . 23 DB . . . . . . . . . . 10 Motorola Hex . . . . . . 3, 5 DW . . . . . . . . . . 10 NOACLIST . . . . . . . . . 11 END . . . . . . . . . 10 NOLIST . . . . . . . . . . 11 EQU . . . . . . . . . 10 Numeric constants . . . . . 7 LIST . . . . . . . . . 10 Object LLEN . . . . . . . . . 11 code . . . . . . . . . 3 NOACLIST . . . . . . . 11 code format . . . . . 5 NOLIST . . . . . . . . 11 file . . . . . . . . . 3 ORG . . . . . . . . . 11 file record size . . . 4 PAGE . . . . . . . . . 11 Octal . . . . . . . . . . . 7 PLEN . . . . . . . . . 12 Opcode . . . . . . . . . . 6 REDEF . . . . . . . . 12 Operand . . . . . . . . . . 6 RSB . . . . . . . . . 12 Operators . . . . . . . . . 8 RSW . . . . . . . . . 12 Options . . . . . . . . . . 3 SET . . . . . . . . . 12 Order form . . . . . . . . 28 TITLE . . . . . . . . 13 Ordering information . . . 27 Disclaimer . . . . . . . . i ORG . . . . . . . . . . . . 11 DW . . . . . . . . . . . . 10 PAGE . . . . . . . . . . . 11 END . . . . . . . . . . . . 10 Page length . . . . . . . . 4 Environment variable . . . 5 PLEN . . . . . . . . . . . 12 EQU . . . . . . . . . . . . 10 Quiet mode . . . . . . . . 4 Expanded version . . . . . 26 Record size . . . . . . . . 4 Expressions . . . . . . . 7, 9 REDEF . . . . . . . . . . . 12 Files . . . . . . . . . . . 1 Registration . . . . . . . 25 Hexadecimal . . . . . . . . 7 Reserved words . . . . . . 7 Index . . . . . . . . . . . 29 RSB . . . . . . . . . . . . 12 Installation . . . . . . . 1 RSW . . . . . . . . . . . . 12 Intel 8044 . . . . . . . . 14 SET . . . . . . . . . . . . 12 Intel 8048 . . . . . . . . 17 Site registration . . . . . 25 Intel 8051/52 . . . . . . . 18 Source line . . . . . . . . 5 Intel 8080 . . . . . . . . 22 Special sections . . . . . 14 Intel 8085 . . . . . . . . 23 Symbol table . . . . . . . 4 Intel 8096 . . . . . . . . 23 Symbols . . . . . . . . . . 7 Intel Hex . . . . . . . . . 5 System requirements . . . . 1 Introduction . . . . . . . 1 Table of contents . . . . . ii Micept Instruments Inc. - Cross Assemblers (Series I) 30 TITLE . . . . . . . . . . . 13 Update policy . . . . . . . 24 Zilog Z80 . . . . . . . . . 23